/* This examble shows how to enable and disable peripheral clocks and toggle a LED with the XOR Operator ^

 * Over the last time, dramatically lowering current draw has been a goal for most microcontroller manufacturers.

 * One of the techniques used to achieve this is to switch off on-chip peripherals by removing access to their master clocks.

 * On the STM32 devices, these clocks are known as the hardware and peripheral clocks and are controlled by the RCC

 * (Reset and Clock Control) group of registers. Since there are more than 32 on chip peripherals, there are actually

 * two registers used to switch on a clock: RCC_AHB1ENR and RCC_AHB2ENR.

 * The clock is controlled by set/reset registers, so to turn a system on you set a bit in the ENR register, and to turn

 * that same peripheral off you set the bit in the corresponding RCC_AHBxRSTR register.

 * Go and have a read of the register descriptions now, they start on section 5.3 of the STM32F4 Reference Manual.

 *

 * To switch the clock for GPIOD on and off, we do something like this:

 */

 

#include <stm32f4xx.h>

 

int main(void)

{

    int i;

 

    RCC -> AHB1ENR |= RCC_AHB1ENR_GPIODEN;       // Enable CLK for PortD in peripheral clock register (RCC_AHB1ENR)

    RCC -> AHB1ENR |= RCC_AHB1RSTR_GPIODRST; // Disable CLK for PortD in peripheral clock register (RCC_AHB1RSTR) to reduce power consumption

 

    GPIOD -> MODER |= (1<<30);  // Set pin 15 (blue LED)to be general purpose output in GPIO port mode register

    GPIOD -> ODR |= (1<<15);    // Turn GPIOD pin15 (blue LED) ON in GPIO port output data register

 

    while(1)

    {

        GPIOD -> ODR ^= (1<<15);       // Toggle the LED

        for (i = 0; i < 1000000; ++i);   // delay

    }

}

 

/* mit dem Dereferenzierungsoperator -> wird auf die Member der jeweiligen Struktur zugegriffen!

 * Hier ein Beispiel einer Struktur aus der Headerdatei stm32f4xx.h:

 *

 * stm32f4xx.h:

 * .....

 * .....

 *

 *  typedef struct

 *  {

 *   __IO uint32_t MODER;    //!< GPIO port mode register,               Address offset: 0x00

 *   __IO uint32_t OTYPER;   //!< GPIO port output type register,        Address offset: 0x04

 *   __IO uint32_t OSPEEDR;  //!< GPIO port output speed register,       Address offset: 0x08

 *   __IO uint32_t PUPDR;    //!< GPIO port pull-up/pull-down register,  Address offset: 0x0C

 *   __IO uint32_t IDR;      //!< GPIO port input data register,         Address offset: 0x10

 *   __IO uint32_t ODR;      //!< GPIO port output data register,        Address offset: 0x14

 *   __IO uint16_t BSRRL;    //!< GPIO port bit set/reset low register,  Address offset: 0x18

 *   __IO uint16_t BSRRH;    //!< GPIO port bit set/reset high register, Address offset: 0x1A

 *   __IO uint32_t LCKR;     //!< GPIO port configuration lock register, Address offset: 0x1C

 *   __IO uint32_t AFR[2];   //!< GPIO alternate function registers,     Address offset: 0x20-0x24

 *  } GPIO_TypeDef;

 *

 * .....

 * .....

 * #define GPIOD    ((GPIO_TypeDef *) GPIOD_BASE)

 *

 * Der Strukturzugriff erfolgt dann z.B. über GPIOD -> ODR

 */